Remote-processing RPC-210 Manuel d'utilisateur Page 41

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EXTERNAL INTERRUPTS SECTION 9
Page 9-1
Figure 9-1 Interrupt inputs at Connectors
INTRODUCTION
EXTERNAL INTERRUPTS SECTION 9
External CPU interrupt INT 0 is available for a number
of devices. INT 0 responds to low level signal at either
J7-3, J8-6, or J11-8 by executing code declared by
ONIT R when the curr ent RPBA SIC-52 instruction is
finished. Usually, this is less than 5 mSec.
INT 0
This interrupt line goes to J7-3, J8-6, and J11-8. This
line has a 10K pull up. This allows wired OR operation
with other interr upts and expansion boar ds.
INT 0 can be used by the real time clock (J7-1) or
counter (at J11-8). The real time clock allows for wired
OR operation. The coun ter does not.
WARNING:
COM 1 serial port uses INT 0. If you are using
COM 1, you cannot use this interrupt.
Interrupt 0 is level sensitive. This means that as long as
the line at INT 0 is low, code starting at the line set in
ONITR will execute if an RETI instruction was given.
If a RETURN is given, then interrupts stay turned off.
The table below gives the source of interr upts.
Interrupt
0 Source
Description Wire
OR?
J7-1 Real time clock Y
J7-5 COM 1 UART Y
J7-4 Clock square wave N
J8-6 Expansion port N/A
J11-7 Counter carry N
J11-9 Counter Borrow N
J11-10 Quadrature latch N
J11-8 Counter port N/A
INT 0 is available at the following 3 connectors: J7-3,
J8-6, and J11-8.
Programming
The ONITR command is use d to enable and disable
hardware interrupts. The return from an interrupt uses
the RET I statement.
10 ONITR 0,500
20 A = A + 1
30 GOTO 20
500 PRINT A
510 A = 0
590 RETI
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