Remote-processing RPC-30 Manuel d'utilisateur télécharger pdf (Page 34)

WATCHDOG TIMER CHAPTER 11

Page 32 RPC-30

Figure 11-1 External reset

DESCRIPTION

The watchdog timer is used to reset the RPC-30 if the

program or CPU "crashes". When enabled, the program

must write and data to I/O address 96 at least once every

1.2 seconds to avoid a reset. The timeout is not

adjustable.

The watchdog should be disabled when using INPUT and

DELAY statements. Also, loops which do not end

quickly or are of indeterminate duration should be

avoided unless a timer reset pulse is included. An

example of an indeterminate loop is one that waits for a

port condition to change.

The watchdog is enabled by writing a 1 to address 16,

bit 1 and disabled by writing a 0 to the same location

(use the BIT statement to do this). The timer is reset by

a write of any data to I/O address 0.

The watchdog timer is part of a voltage monitor, battery

backup controller, and reset chip U6.

PROGRAM EXAMPLES

The following program fragments enable the watchdog

timer, reset it while the program is running, and then

disables it.

100 BIT 16,1, 1 :' Turn on watchdog

5000 OUT 96,0 :' Reset timer

10000 BIT 16,1, 0 :' Turn off watchdog

EXTERNAL RESET

The RP C-30 m ay be reset by an exter nal switch via

jumper W1. Short terminals 1 to 2 to cause a reset. If

the reset line is excessively long or in an electrically

noisy environment, connect a 1K pull-up resistor to W1-

1. This will prevent err oneous resets.

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Remote-processing RPC-30 Manuel d'utilisateur Page 34